Current-mode logic (CML), or source-coupled logic (SCL), is a digital design style used both for logic gates and for board-level digital signaling of digital data. The basic principle of CML is that current from a constant-current generator is steered between two alternate paths depending on whether a logic zero or logic one is being represented. Typically, the generator is connected to the two sources of. OperationThe fast operation of CML circuits is mainly due to their lower output-voltage swing compared to the static circuits, as well as the very fast current switching taking place at the input differential-pair transistors. Recently, CML has been used in ultra-low power applications. Studies show that while the leakage current in conventional static CMOS circuits is becoming a major challenge in lowering the energy dissipation. • (LVDS) – a differential standard used primarily for signals between modules.• – a differential signaling standard for high-speed inte.
[PDF Version]